Ugh.... similar to BitGrid[1] (my own hobby horse), but not. I imagine bits marching in parallel across a grid in the ultimate simplification of an FPGA. It's an idea that either has supreme utility (Petaflops for the masses), or doesn't... it's all down to how much energy a DFF takes on an ASIC. (This is a pair of numbers I've been trying to find forever... static power, and energy to load a bit)

Oh... and the programming model, nobody likes plopping logic down on a grid, they try to abstract it away as fast as possible. I don't have sufficient focus to be able to do that bit.

[edit] Somewhere in exploring this, I came across Von Neumann cellular automaton[2] and Nobili cellular automata[3], which I've not encountered, despite being interested similar ideas for decades. It's frustrating just how little discoverability there is in this portion of computer science.

Of course both share the same insane foundation:

  The set of FSAs define a cell space of infinite size. All FSAs are identical in terms of state-transition function, or rule-set.

It's that one "simplification" that relegates them to the domain of code golf.

[1] https://github.com/mikewarot/Bitgrid

[2] https://en.wikipedia.org/wiki/Von_Neumann_cellular_automaton

[3] https://en.wikipedia.org/wiki/Nobili_cellular_automata

pps: If anyone wants to run with the idea of a BitGrid, I'd appreciate it