alt Hacker NewsMuch more influential 16-bit CPUs from that era include the PDP-11's CPU, the Data General Nova's CPU, the Xerox Alto's CPU, and arguably even the 8086 and 8088. The chronology seems to go as follows:
- 01965: IBM 1130
- 01966: HP 2116A, the first model of the HP 2100 series
- 01969: Nova
- 01970: PDP-11
- 01971: IBM System/7
- 01973: Alto (not shipped. NEVER shipped)
- 01973: TI-990 (the 990/3, according to https://cozx.com/dpitts/ti990.html)
- 01974: HP 3000
- 01974: PACE (which was from National Semiconductor, not National Instruments)
- 01975: CP1600
- 01976: TMS9900 (what the TI-99/4A used)
- 01976: Tandem (first Tandem/16 shipped to Citibank)
- 01978: 8086
- 01979: 8088
- 01981: TI-99/4A
Since there were plenty of 6-bit, 8-bit, 12-bit, 32-bit, 36-bit, 60-bit, and 64-bit CPUs in the 01950s, you'd think there would be some 16-bit CPUs then too, but I can't think of any. I'd even forgotten about the HP 2100 until I went looking just now.
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Famous 16-bit computer from the 1950s: https://en.wikipedia.org/wiki/Whirlwind_I
A interesting 12-bit microcontroller I just learned about is the "Toshiba Transistor Works" TLCS-12 for Ford's engine control module (1973). I'm trying to find a full datasheet for it:
https://www.shmj.or.jp/english/pdf/ic/exhibi739E.pdf
I would add the Honeywell 316/516 series to the list. The 316 was the first 16-bit minicomputer, still using DTL logic. The 516 used TTL and served as the IMP 'router' in the early ARPANET. They were fairly popular before the PDP-11 took over with its brillant architecture.
Depends what you call '16-bit'. The addressable word size [1] for the PDP-11 was 8-bits and the problem space address space was 16-bits so a user program on the PDP-11 could ac cess 64kB of RAM, same as an Apple ][, except that multiple users could have their own address spaces.
The IBM 360 had 24-bit addresses, 8-bit words, and 16 32-bit registers.
8-bit words were thoroughly established by 1980s for general purpose computers, I think because of the use of 7/8-bit ASCII characters. I mean, you could pack ASCII characters into larger words in different ways but the most comfortable (portable) way to handle them is to have a char* which requires either 8-bit words or some way to address subwords.
The PDP-10 was probably the most loved heterodox architecture with a 20-bit address space and 36-bit words. It had pointers that could point to specific bits inside a word so it was possible to port C to it with char*'s. The user space was 256k words and 1152M bytes. (If an architecture like the PDP-10 let you access bits in the next word you could even point something like a char* at a variable sized UTF-8 char if you don't mind pointer arithmetic being limited to scans)
Some of the 8-bit micros had 16-bit registers such as the 8086/8088 and the 6809. The word size doesn't have to be related to the size of the data bus: the 8088 had an 8-bit data bus and the 8086 had a 16-bit data bus, it just pumped twice if it needed 16-bits. The 68k series had 32-bit registers and a 32-bit address space (like the DEC VAX which was the first modern computer) but had various bus sizes as low as 8-bits in the 68008.
With a cache the data bus could be larger than the word size.
Programming really isn't fun if you don't have index registers at least as large as the address space. There were numerous attempts to extend 8-bit architectures to a 24-bit address space that didn't provide large enough index registers, the 65816 is probably the most famous. The eZ80 on the other hand, extends the registers to 24-bits so it's easy to write programs that use the whole address space.
[1] which I'm just going to call word size