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jamesblondelast Wednesday at 6:42 AM1 replyview on HN

I don't know how you got from Barrelfish (a message-passing OS) to a RISC-V CPU. Bit of a stretch. Just because they are both messaging passing distributed systems?


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transputelast Wednesday at 2:38 PM

Apologies, mistake in my notes. Should be Enzian (48-core Arm + FPGA).

From Mothy (Barrelfish researcher) profile, https://people.inf.ethz.ch/troscoe/ & https://enzian.systems/why-enzian/

> Building and using a research computer called Enzian for experimentation with hardware/software codesign for servers.. If academics can’t do relevant, impactful, and medium-to-long-term system software research using commodity platforms, and they can’t do it using someone else’s cost-optimized application-specific custom hardware, what can they do? Our response is to build Enzian: a computer.. optimized for exploring the design space for custom hardware/software co-design.. over-engineered relative to any off-the-shelf hardware.. optimized for flexibility and configurability rather than unit code, efficiency, or performance along any particular dimension.