alt Hacker News> From the circuitry on the die, this pin appears to be an output. If someone with a 386 chip hooks this pin to an oscilloscope, maybe they will see something interesting.
Would be a fun surprise if the 386 had its own Halt and Catch Fire mode.
> From the circuitry on the die, this pin appears to be an output. If someone with a 386 chip hooks this pin to an oscilloscope, maybe they will see something interesting.
Would be a fun surprise if the 386 had its own Halt and Catch Fire mode.
It had ICE mode (precursor to SMM, but used for production testing and low-level debugging), and according to this article, the pins were exposed at least on some of the chips you could buy:
https://www.rcollins.org/ddj/Jan97/Jan97.html
>On the standard Intel 80386 DX, asserting the undocumented pin at location B6 will cause the microprocessor to halt emulation and enter ICE mode.
[this is written from an ICE perspective - for "emulation", read "normal operation"]
This mode was introduced in the 80286, but I don't think the pins were exposed except in the special bond-out variant for ICE, and maybe early samples. You can trigger it in software (opcode 0F 04 on the 286, or by enabling a bit in DR7 on the 386), but then the processor disconnects from the bus and you have to reset it.
On the 286, you can get it to dump some otherwise hidden internal state, by using a prefix that no longer exists on 386s: https://rep-lodsb.mataroa.blog/blog/intel-286-secrets-ice-mo...