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Show HN: An LLM-Powered Tool to Catch PCB Schematic Mistakes

23 pointsby wafflesfreaktoday at 5:30 PM19 commentsview on HN

Comments

swatcodertoday at 7:11 PM

Where's the performance data?

Anybody can send a PCB description/schematic into an LLM, with a prompt suggesting it generate an analysis and it will diligently produce a document that perceptually resembles an analysis of that PCB. It will do that approximately 100% of the time.

But making an LLM actually deliver a sound, useful, accurate analysis would be quite an accomplishment! Is that really what you've done? How did you know you got it right? How right did you get it?

To sell an analysis tool, I'd expect to see some kind of comparison against other tooling and techniques. General success rate? False negative rate? False positive rate? How does it do against simple schematics vs large ones? What IC's and components will it recognize and which will it fail to recognize? Does it throw an error if it encounters something it doesn't recognize? When? Do you have testimonials? Examples?

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ProllyInfamoustoday at 6:50 PM

Would this catch physical interference issues from known components? e.g. conflict spacing, connector pin-out chirality?

I know a brilliant PCB engineer whose first major multimillion dollar R&D corporate design (decades ago) resulted in production of a modular product which couldn't physically plug in with the rest of the system (because of above issues)... I'll send him this link to see if he'll give you feedback, but that's going to be how he'd initially test your AI system (he considers it a humbling lifetime blunder).

Without any PCB design experience, my presumption is that OP's "AI product" is more of just a "fundamentals of circuit board design"[0] and not an all-expansive "how did no human ever catch such a simple multi-dimensional clash"[1]

[0] isolated voltage areas; trace attenuation avoidance; signal protection

[1] the darn thing won't even plug in, because the plug is pin'd-out backwards

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wafflesfreaktoday at 5:30 PM

Netlist.io is a web app that ingests your KiCad/Altium netlist and relevant datasheets so an LLM can reason about the actual circuit. It’s built to catch schematic mistakes that traditional ERC tools often miss, and it can even help debug already-fabbed boards by letting you describe the failure symptoms.

I built this because I was tired of shipping boards with avoidable mistakes — hopefully it saves you from a re-spin too!

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proeetoday at 5:47 PM

Back in the day our hardware group created a pre-flight checklist before sending boards off to fab. This reduced our errors significantly and got rid of stupid mistakes. Your product idea sounds great and has ton of opportunity for additional features like supply chain analysis, alternate part sourcing, EMC advisory, etc.

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noshitsherlocktoday at 6:51 PM

Would this tool be able to accommodate vacuum tube designs and the associated schematics, either point to point. Or PCB?

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iamjackgtoday at 6:12 PM

Somewhat related: a while ago I was working on a project and wanted to use an RS485 to TTL conversion board which came with badly translated instructions. However, somebody had reverse engineered the design and uploaded an EasyEDA schematic. I shoved the raw JSON for the schematic (which looked quite cryptic to me) into Gemini 2.5 Pro and asked it if it could understand it, and it cheerfully responded with:

> Of course, Jack. I can understand the schematic from the provided JSON file. It describes an RS485 to TTL Converter Module. > Here is a detailed breakdown of the circuit's design and functionality

...followed by an absolutely reasonable description of the whole board. It was imprecise, but with some guidance (and by putting together my basic skills with Gemini's vast but unreliable knowledge) I was able to figure out a few things I needed to know about the board. Quite impressive.

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