Define “upmarket” ?

For me, that means higher capacity and advanced blocks such as SERDES, high-speed DRAM interfaces etc.

The bottleneck in using these kind of FPGAs has rarely been the tools, it’s the amount of time it takes to write and verify correct RTL. That’s not an FPGA specific problem, it applies to ASIC just the same.

I don’t see how GoWin and other alternative brands would be better placed to solve that problem.