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Neywinyyesterday at 5:23 PM1 replyview on HN

What pattern in the data shows that's what's being measured? I would expect to see basically 0 latency between adjacent "cores" then since L1 is shared per thread?


Replies

monocasayesterday at 6:30 PM

Co resident threads might not get any speed up here since coherency instructions are functionally operations on the L2 cache.