Traceformer.io is a web application that ingests KiCad projects or Altium netlists along with relevant datasheets, enabling LLM-based schematic review. The system is designed to identify datasheet-driven schematic issues that traditional ERC tools can't detect.
Since our first launch (formerly as Netlist.io), we've made some big changes:
- Full KiCad project parsing via an open-source plugin
- Pass-through API pricing with a small platform fee
- Automatic datasheet retrieval
- ERC/DRC-style review UI
- Revamped review workflow with selectable frontier models (GPT 5.2, Opus 4.5, and more)
- Configurable review parameters (token limits, design rules, and parallel reviews)
Additionally, we continue to offer a free plan which lets you evaluate a design before subscribing. We're looking forward to hearing your feedback!
Cool! Earlier in 2025 I decided I wanted to design a CAN-FD connected motor controller for RRF / Klipper / custom firmware without any experience.
I'm a software eng now working outside of the tech sphere so not exactly an electronics expert. I know enough to be dangerous but thats about it.
I found Gemini to be pretty great at validating an exported KiCAD netlist against the relevant datasheets with a few caveats.
The RP2350 datasheet in particular was an issue due to its sheer size - bigger than the maximum token limit.
I got around this by extracting the relevant parts of the datasheet myself.
It sounds like you might have this well in hand but worth asking anyway. I assume you've had good experiences testing with MCU datasheets and not just passives / power components?
When it got something wrong it was wrong enough to be noticeable by a non expert and with iterations over the schematic and an incredible amount of time spent learning how to lay stuff out properly, I got a reasonably complex board (double sided, 6 layer, roughly 130 components) produced and fully functional first time.
I'm interested in trying this out on my working design and seeing what it comes up with!
If you can keep this cheap enough for hobby use (or pay as you go for example) and also find a way to validate or check for common layout concerns then that would be incredibly powerful.
It's great to see some genuinely useful use cases for LLM tech that isn't just "we replaced our support people with a shitty chat bot" :)
If you get this dialed in, you could charge a LOT more. Your big market is enterprise customers that need to review schematics that are 30 pages long with FPGAs, memory busses, and lots of connectors. You should segment the hobbyist for the $10-20/month and then enterprise customers at $+100/month. If your product catches just one major problem in a schematic, it could save a full revision which is worth thousands of dollars.
I don’t see how you would get a good training set on this or put it in a format that LLMs understand
Fantastic idea. I've done some PCB stuff in the distant past. But not recently.
I wish I had some examples to test against this.
Best of luck going forward. This is the kind of tool that could make a difference.
Previously:
Show HN: An LLM-Powered Tool to Catch PCB Schematic Mistakes - https://news.ycombinator.com/item?id=46080737 - Nov 2025 (29 comments)
Can it detect problems in basic schematics consisting of say 5-10 transistors, and perhaps a bunch of resistors and capacitors?
Would it be able to detect issues with functionality, and maximum ratings?
Looks pretty neat, but you really need to have Cadence (OrCAD or System Capture) format support to scale to larger organizations. Most larger hardware companies aren't using KiCAD or Altium outside of one-off projects.
This... Actually might be the first AI product I'd ask my work to look into. I've had only one schematic reviewer out of the group catch that a part I'd re-used elsewhere in a design I inherited to reduce complexity + increase configurability actually didn't meet the voltage I needed for it. That example at the start is exactly what was needed and how it was found+fixed. Check the datasheets, check the schematic.
Only concern is the datasheet limit. We tend to have bigger designs than that. Also we're not using KiCAD but maybe it could export.