Congratulations on learning about distributed electronic computers. (This is worth tinkering with. This is how people actually get good at HPC.)

Pay attention to your SRAM (L3 unified cache), DRAM and swap space tilings.

[Snark] In practice: With memory access latency depending on both the square root of the memory size and the physical lengths of the wires in your cluster this sounds like a case for Adam Drake:

https://adamdrake.com/command-line-tools-can-be-235x-faster-...