alt Hacker NewsThe 80186 and NEC Vxx chips - and of course also the 286 - could already do mul/div in one cycle per bit (+ some overhead for the microcode). What they didn't have was the early-out optimization.
The three-operand form of IMUL also already existed on those processors.
>This wasn't just an incremental upgrade—it was the foundation that would carry the PC architecture for decades to come.
AI?
> AI?
Probably not; this point is well justified by both theory and practice. Supporting suitably larger operands is indeed what naturally comes following the increase of computation demands.
One point I do differ from the author is that register width don't necessarily correlate with the size of address space. Even 8bit machines can address a large space by splitting apart the logical address and using multiple registers. Likewise, having a wide register does not imply the same address width.