Prefix sums at gigabytes per second with ARM NEON

The interleaved load trick is clever, i never thought about using vld4 that way. always assumed SIMD would struggle with sequential dependencies like this since each value depends on the previous one curious how this holds up on older ARM chips, like would you see similar gains or does it depend heavily on the M4's specific pipeline. also wonder if there's a similar approach for AVX on x86 or if the instruction set makes it more awkward.

As not mentioned in the article, if you want the general form of this algorithm, it is a Hillis-Steele prefix sum: <https://en.wikipedia.org/wiki/Prefix_sum#Algorithm_1:_Shorte...>

What's going on with SVE[2] support in the ARM land? It's weird that even Apple's M5 still doesn't support it (other than SME[2]).

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