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0xDEFACEDtoday at 1:38 AM3 repliesview on HN

any hope that this could be applied to improving memory fab yields and ease some of the capacity constraints on consumer devices? asking for a friend


Replies

adrian_btoday at 9:58 AM

For now, this is useful only for the processes used to make the latest CPUs, like Intel Panther Lake and Clearwater Forest in the 18A process and various CPUs for smartphones or computers that have been launched recently or which will be launched around the end of the year and which are made with the TSMC 2 nm process.

Memories use more mature fabrication processes, for which it is likely that electron microscopy already worked well enough.

The article is about a better method for processing the output of an electron microscope, which enables a better image resolution than in the past and the 3D reconstruction of the surface of the device. This is needed for the 2 nm/18A processes and their successors, for which the existing tools were insufficient.

lovichtoday at 2:06 AM

Less likely than just inducing more demand from the AI firms

Joel_Mckaytoday at 3:39 AM

Silicon has 23 known isotopes, and now you why it will unlikely ever be economical to reach 0 defects in a business context.

Modern chip designs do include over-provisioned features, so designers can often selectively downgrade areas that are not viable.

Chenming Hu books about solar cell physics and semiconductors are quite accessible. =3