It's not like Apple soldered some plain old DDR5 to a PCB to be difficult:

1. It's TSMC's InFO_POP, which has significant performance benefits.

2. There weren't even any modules that existed for LPDDR until very recently. (and while the A18 was being designed, it didn't exist)

3. The power/price/performance/thermals they are able to achieve with this configuration is not possible with socketed RAM. You are asking them to make the device worse

Go pop open a Framework with an Ryzen AI Max processor -- you won't find socketed RAM. Technology has moved on. Math coprocessors and CPU cache aren't separate modules anymore either. AMD has even said they studied the possibility of LPCAMM for Strix Halo and found that even it wasn't good enough for signal integrity.