> using (undocumented!) channel scrambling offsets that works on AMD, Intel, and Graviton
Seems odd to me that all three architectures implement this yet all three leave it undocumented. Is it intended as some sort of debug functionality or what?
it's explained in the video, and there's no way I'll be explaining it better than her
it's explained in the video, and there's no way I'll be explaining it better than her