alt Hacker NewsI had Claude build a spiking neural net example for classifying MNIST digits in FPGA last week. It wrote the verilog and seemed to deal fine with timing issues. The FPGA receives a binarized/downsampled (to 14x14) image via SPI and runs the classification. ~8K LUTs in an ECP-5 85K. 95% accuracy. Claude even built me an app that runs on the PC side that lets you draw a digit and then send it to the FPGA via SPI.
I've also had it make mods to an existing RISC-V processor to add custom accelerators. Did fine there as well.
> MNIST digits in FPGA
Your example suffers from one of the same problems in the paper. They exclusively used text book level problems in their eval of the models HDL coding ability. These are effectively poisoned in the training data with many many copies of solutions done in different ways.