alt Hacker NewsS has never implied Xtensa, and C doesn't imply RISC-V. That's a widely held misunderstanding. S, C, P, etc. are product categories. S devices are high performance SoCs; large feature set, high frequency, not the lowest power or cost.
Just appending 1 to S3 is odd though. This MCU is step change for Espressif. S4 or something would make more sense.
Not saying you're wrong (appreciate the explanation) but S has been Xtensa and C is RISC-V; even if you don't imply, it's how the things have been. And given S2, S3, and C5 are all clocked at 240 MHz, the performance difference is kinda blur.