The 4.7k "default pullup" is an old-school 5V TTL thing. It works really well for TTL inputs. But CMOS inputs don't really care very much, especially if they aren't toggling or if there's a bit of hysteresis on the input stage (which there often, but not always, is). There seem to be 10k resistors in every design so CMOS pullups often end up at 10k. If power savings are a concern, especially if you need a tie-off more so than a pull resistor, 10k-100k is a perfectly valid range, and I've even used 1M in extreme circumstances.

Usually 5k is a little too weak for I²C. Rule of thumb is that you want to be around 1mA, so for a 3.3V system you start at 3.3k. Generally 1.8k to 3.3k ends up being a pretty common range. More current is usually better than less current, so even at 5V where 4.7k might be OK (if you're even at 5V Vdd these days), going stronger is often a good idea. If power savings is a concern, or if timing's somehow important (did you find another touchy badly behaved I²C device? say it isn't so!) then it might be time to break out the active pullup structures (mostly current source type things). Once this is done and tested it tends to get fossilized, for good reason, so this one won't usually get swept up in a standard-effort cost reduction pass.