No it does not assume that. Some very smart people will write that model.toVHDL() function. And keep in mind that a DL model is only a very small subset of what you can use VHDL for, and most models will have a very similar implementation in hardware from a conceptual point of view.
And don't take it too literally, VHDL could be replaced by other hardware design languages, maybe even at lower abstraction levels.
No it does not assume that. Some very smart people will write that model.toVHDL() function. And keep in mind that a DL model is only a very small subset of what you can use VHDL for, and most models will have a very similar implementation in hardware from a conceptual point of view.
And don't take it too literally, VHDL could be replaced by other hardware design languages, maybe even at lower abstraction levels.