alt Hacker NewsMeta reuses old RAM in new servers with custom bridge chip
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Why not go directly to the source article that has a lot more details?
https://www.theregister.com/systems/2026/06/29/zuck-saves-me...
if not the prices, no one would have implemented this in large scale solution..
From the paper:
"Our CXL solution achieves substantial gains for diverse workloads, including up to a 25% reduction in server count for disaggregated ML inference"
How does using worse RAM result in 25% reduction of server count for given workloads?
It’d be nice if there were a consumer version of this. I have plenty of old RAM.
There are standard product CXL memory expander chips if you don't want to design a custom chip.
The interesting part of this "RAM crisis" is similar to other fields where a problem results multiple parties looking for alternative solutions.
This yields for exciting ideas or workarounds that might result a post-crisis memory boom (hopefully) also for local machines.
1. Lowest, Apple is evaluating new Chinese manufacturer which means change of supply demand if indeed it has reasonable QA. (https://www.ft.com/content/f4ac5c92-03be-4499-b16a-017a7e9ee...)
2. Companies tries to workaround performance - suddenly single channel is 'ok' ? :) (https://www.gigabyte.com/press/news/2403)
With regards to RAM price I never understood the following: A 16GB RAM stick has 16*8=128 billion bits, with 1 transistor per bit, thats still 128B, yet its supposed to cost like $60 before the price hikes? In contrast, a 5090 GPU was $2000 (true it has RAM, but you're paying for the GPU ASIC really, I guess the rest of the GPU was less than $500), it had 93B transistors.
GPU transistors are smaller due to the more advanced process node (cost per transistor metrics aren't really clear, if they improve on advanced node or not, but I'd say they get cheaper as they get smaller, as technology costs are amortized).
I'm sure both RAM and logic use a process that is quite similar in both inputs and manufacturing steps. So while RAM is a commodity product, this insane price difference didn't make any sense.
So I guess when those fundamental inputs become a constraint, it would make sense for $/transistor move closer for both, which is a massive hike for RAM.
ScholarlyArticle: "Vistara: Making CXL Real—Full Path from ASIC Design and OS Support to Hyperscale Deployment" (2026) https://aisystemcodesign.github.io/papers/isca26/vistara_cam...
TIL there are 2x 2.5GbE PCI-E HAT adapters for Pi 5.
How to attach RAM to the new NVLink/UALink fiber buses?
If they grow desperate I have GBs of DDR2 AND DDR3 in a drawer.
Supply-demand economics really went awry in the age of chasing agi
ServeTheHome already reported on CLX memory expansion controllers back in December: https://www.servethehome.com/hyper-scalers-are-using-cxl-to-...