I think the future will have to include specialised host boards for memory chips.

What I actually want is an FPGA board with a very large number of DDR3/DDR4 RAM slots arranged in banks (2, 4, 8 or even more banks). I want an FPGA board that can hold 1TB of DDR3/DDR4 RAM.

The throttling point right now is not RAM, it's bus speed. Having different busses for banks of RAM alleviates that.