To add to this.

- allow drawing wires backwards from sink to source

- allow connecting inputs

Also there is a problem with the tests and the simulator that showed up in the SR latch level. Despite having the correct circuit, the tests failed until I swapped the two NOR gates. I can not reproduce it, but I would guess it has something to do with the component placement order, the update order of the simulator, and how the tests are executed. As the NOR feedback loop has no well-defined initial state, it probably settled in a placement order dependent way that made the tests fail. Maybe Q was already 1 and the test looks for a 0 to 1 transition when enabling S?