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inigyoutoday at 9:01 AM1 replyview on HN

Which is the whole chip, because if you only refresh any limited number of rows, the next row outside that range becomes a viable indirect target as shown by Half-Double.

Alternatively you would also count the refresh as a hammer on its adjacent rows.


Replies

bell-cottoday at 10:10 AM

> Which is the whole chip, because ...

Here's the actual Half-Double paper:

https://www.usenix.org/system/files/sec22-kogler-half-double...

Note two things:

- The entire chip is already refreshed every 32ms to 64ms, because the capacitors which implement DRAM lose their charges over time.

- The time required to induce an exploitable bit flip is (in one system tested) was ~22ms

So: Even if it was the whole chip - vs., say, the 6 nearest rows to the highly-accessed row - the more-frequent refreshes would not be a big deal.

> Alternatively you would also count the refresh ...

Sure. Or once any row access counter triggers a refresh, extend that to every row with a row access counter within (say) 25 of its limit. And if that ends up refreshing more than (say) 25% of the chip, then just refresh the entire chip.