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topspintoday at 8:25 PM0 repliesview on HN

Beautiful.

I read the "They Should Have Known Better" article and forgot it. I've seen this before. I know it's hot air and does not matter, and I can't afford to worry about things that don't matter.

When I say I've seen this before, I'm talking about ancient history: controversies so old and so laughable that they've been forgotten. When, for example, AMD handed the world AMD64/X86_64, the same things were said: fragmentation, legacy+flawed ISA, etc. That has not aged well, and "They Should Have Known Better" won't either.

The "fragmentation" argument has no merit. The jumble of extension names and profiles in RISC-V are, in fact, direct evidence that RISC-V is succeeding: it's the RISC-V ecosystem aggressively, collaboratively and successfully tackling pain points and solving them. This is what RISC-V is supposed to be doing, and it's doing it, and empires are being built on it.

Take this part: "The existence of CLIC and various proprietary 'fast IRQ' / auto-stacking extensions is an additional indictment."

CLIC is miraculous. It's an advanced embedded interrupt controller, and it's wonderful: it brings the equivalent of ARM's NVIC to RISC-V, except better. You can implement an extremely efficient scheduler that guarantees deadlock-free concurrency: bare-metal, real-time, hardware-accelerated "Fearless Concurrency," on an MCU with no RTOS![1] Its appeal is so great that, despite still being a draft spec, the leading RISC-V MCU designers are adopting it. Espressif's ESP32-S31 has it, for example. The chaotic emergence of this awesome thing is what is condemned as an "indictment."

Speaking of ESP32-S31, it's going to be a monster when silicon becomes available in quantity. This RV Embedded writing mentions MMUs a lot. Guess what? The S31 has an Sv32 MMU. It can run Linux. Not μClinux. Real Linux. It's already been done twice (that I know of) on the Espressif eval boards. People like Armstrong Subero are going to change the world with it.

That's the froth of RISC-V. The ground is shaking, and the peanut gallery of ISA wizards has no power over it. In a few years, after RISC-V has lain waste to our world of proprietary ISAs and Western IP regime rent seeking, "They Should Have Known Better" will look as silly to everyone as it already looks to me.

[1] https://rtic.rs/2/book/en/