Eh, most device interactions are mostly "build a command list and shared memory buffers" rather than the classic touch a a bunch of registers to perform the data plane work. UARTs are one of the last bastion of the old style, mostly because of how you want them so early in the boot process for debug out, it's nice to not have a shared memory/command list access pattern.
That being said, I've even seen it for UARTs on microcontrollers where they're hoping to not have FIFO block RAMs taking up area dedicated to UARTs that might not even be enabled. There you have a absoute minimal staging buffers in the UART, and a fairly reconfigurable DMA controller to allow you to use sharable main RAM instead.
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Eh, most device interactions are mostly "build a command list and shared memory buffers" rather than the classic touch a a bunch of registers to perform the data plane work. UARTs are one of the last bastion of the old style, mostly because of how you want them so early in the boot process for debug out, it's nice to not have a shared memory/command list access pattern.
That being said, I've even seen it for UARTs on microcontrollers where they're hoping to not have FIFO block RAMs taking up area dedicated to UARTs that might not even be enabled. There you have a absoute minimal staging buffers in the UART, and a fairly reconfigurable DMA controller to allow you to use sharable main RAM instead.