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pixl97 • yesterday at 2:43 PM • 2 replies • view on HN

From just writing code, no.

Now, the question is can we make some kind of formal verification language that forces checks everything and doesn't allow bugs? Maybe?

But that's assuming the underlying hardware and firmware doesn't have flaws that can break those assumptions too.


Replies

wongarsu • yesterday at 2:53 PM

That just shifts bugs up one layer, into the specification that you then verify

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jeanpah • yesterday at 4:34 PM

I remember languages like Casl and vdm, But they where harder to implement and very complex, You mean something like those languages ?

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