This is a "build it and they will come" project. It's not a "we put the inner loop of ML entirely in hardware" project. That would make more sense technically. You could cram a lot of little independent neural net inference units on one chip. But if it was pitched that way, the questions would be "Why isn't NVidia doing this", and "After you do it, what keeps NVidia from doing it". There are lots of people pitching "AI chips", with modest success.

The history of general-purpose massively parallel machines isn't good. From the Illiac IV to the Playstation 3, there's been dud after dud in this space. You can build them, but the users don't come. This sort of architecture is great if you have some specific problem that parallelizes, such as finite-element analysis or neural networks.

(I've used an NCube, and I kind of liked the Transputer concept. But both were dead ends.)