alt Hacker NewsDoes anyone know if modern AMD chips allow mapping the L3 cache and using it as TCM instead of cache? I know older non-X86 processors supported this (and often booted into that mode so that the memory controllers could be brought up), but not sure if it's possible today. If so, that would sure make for some interesting embedded use cases for a large DRAM-less system...
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londons_explore • 10/12/2024
If you keep your working set small enough, you should be able to tell the CPU it has RAM attached, but never actually attach any RAM.
It would never flush any cache lines to RAM, and never do any reads from RAM.
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The coreboot docs claim that modern AMD parts no longer support cache-as-RAM.
https://doc.coreboot.org/soc/amd/family17h.html