The article doesn't mention anything about what FPGA image is loaded into the thing.
My guess would be that you can choose how to connect the CPU cores to the cache controller, you might want to run the CPUs independently.
alt Hacker News
The article doesn't mention anything about what FPGA image is loaded into the thing.
My guess would be that you can choose how to connect the CPU cores to the cache controller, you might want to run the CPUs independently.