Maybe 6 months ago. Today anyone vaguely familiar with CPU design can do it.
Lol it's always cute to see the amount of confidence that people have for AI when they can't tell if the work it did is actually good.
and a bit of cloude:
"Make me an OOO RISC-V core in SystemVerilog. No mistakes."
I am somewhat of vaguely familiar with CPU design myself.
Lol it's always cute to see the amount of confidence that people have for AI when they can't tell if the work it did is actually good.